PI Fundamentals Masterclass
Masterclass objectives:
- Gain a clear understanding of the fundamental concepts of power integrity (PI) and its crucial role in modern electronic designs.
- Learn practical design techniques to optimize power delivery networks (PDNs).
- Build confidence in identifying and resolving power integrity issues effectively.
Masterclass content:
- Definition of PI
- Impact of PI
- Importance of PI
- Difference between PI and SI
- Related formulas and their relationships
- Power integrity regions
- Impedance and voltage noise
- PDN as a system
- Fields, energy and inductance
- Time vs frequency behaviour
- Resonance and damping
- Local energy and bandwidth
- DC vs dynamic power
- Target impedance
- Impedance vs frequency
- Resistance, inductance, capacitance
- ESR and ESL
- PDN behaviour
- PDN topologies
- How energy moves on a plane
- How ESL impacts impedance
- Impact of capacitance on impedance
- ESR sets the minimum impedance
- Capacitor placement vs impedance
- Load position vs impedance
- Inductance as the dominant factor
- Mounting inductance optimization
- Key factors for inductance optimization
- PI modelling framework
- PI vs EMI
- Capacitor trade-offs
- Simultaneous Switching Noise (SSN)
- Ground bounce
- PDN stability
- PI vs stack-ups design
- PI crosstalk
Date:
April 1, 2026
Location:
- Sintecs HQ Hengelo (NL)
- On-site (special rate applies)
Duration:
Full-day
Participants:
10 – 20 persons
Note: These sessions are strictly confidential. Recording, copying, or distributing any part of the session, in whole or in part, is expressly prohibited without prior written consent.
Pricing:
Eur 699,- p/p excl. VAT