Signal Integrity Analysis

Better signal integrity

Are you encountering challenges with high-speed interfaces more and more? Are you designing printed circuit boards (PCBs) that are ready for modern demands? Want to make sure they are efficient, durable, and perform in the best way possible? Want to save time testing each single design iteration of your PCB?

Then we at Sintecs know what you need. High speeds occur more often than you might think. Even when working with standard technologies like DDR, USB, and PCI-E high speeds and timing issues are becoming more common. We at Sintecs know the industry best practices and solve the most complex cases because of years of experience and knowledge.

We provide impact on your designs by providing you with better signal integrity solutions, increasing the durability and performance of your electronic designs.

Our track record

Sintecs signal integrity analysts know how to work within the margins of complex high-speed interfaces. Our engineers use each tool at their disposal in their quest for the best from a full-wave solver or a power-aware crosstalk analysis. They possess excellent knowledge of telecommunication, networking, and consumer systems domains.

How we make your signals great

From simple analysis to complex full-wave analysis, we do it all. We combine detailed geometry design drawings with analysis software to give highly informative insights into your design. These result in detailed reports that show information about field lines, possible crosstalk, and how this might affect surrounding components and devices. Reports give our professionals great insights on the potential performance of your design and how we can improve and optimize it.

We worry about high speeds, timing, rise times, and steep slopes, so you don’t have to. We make sure your design works the best way possible while meeting all required certification needs.

Our way of working

We use proven design methodologies with strict internal guidelines and review processes. At the same time, we have an extreme commitment to your deadlines and have a reputation for being flexible so you can deliver on time.

Needed Input for pre-layout SI Analysis

To ensure a thorough and accurate analysis, Sintecs expects the following inputs:

• Clear statement of work for pre layout Signal Integrity Analysis

• Schematic (PDF)

• Preliminary Layout Information (PLI) if available

Needed Input for post-layout SI/PI Analysis

To ensure a thorough and accurate analysis, Sintecs needs the following inputs to be provided (more information is available here):

• Preliminary Layout Information (PLI)

• BOM (Excel)

• Schematic (PDF)

• ODB Data (compressed TGZ)

• Original BTS File (Excel version)

• FPGA design specific IBIS model exported from FPGA design tool (if applicable)

System-Level Signal Integrity Analysis Support

In addition to single-board SI analysis, we offer system-level signal integrity modeling and support for complex assemblies:

• Multi-Board Configurations: End-to-end signal integrity assessments across interconnected PCBs, including backplane and mezzanine link evaluations

• Connector & Interface Analysis: Detailed evaluation of interface discontinuities, impedance mismatches, and cross-board reflections to ensure signal fidelity

• Channel Modeling & Eye Diagram Analysis: Comprehensive channel simulations, including insertion loss, return loss, and eye mask compliance for SerDes and multi-gigabit links

Such analysis inplies additional requirements in input data, soecifically requiring system schematics, interconnect topology diagrams, and relevant S-parameter files when requesting system-level SI analysis.

It has to be noted that system-level SI analysis critically depends on high-quality S-parameter models of cables and connectors. These must be provided by the requester and obtained directly from the component manufacturers to ensure accuracy and validity of the simulations.

Basic Principles of Signal Integrity

Here are the essential principles of signal integrity accepted by Sintecs team:

1. All Interconnects Are Transmission Lines: Every interconnect behaves like a transmission line with a signal and a return path

2. Signals Are Dynamic: Once launched on a transmission line, signals propagate at the speed of light in the material

3. Characteristic Impedance: Managing characteristic impedance is crucial for maintaining signal integrity

4. Reflections: Impedance mismatches cause reflections, which can degrade signal quality

5. Crosstalk: Crosstalk between signal lines can cause interference and must be minimized

6. Ground Bounce: Ground bounce can affect signal integrity and should be controlled through proper design

7. Power Delivery Network (PDN): A well-designed PDN is essential for maintaining signal integrity

8. Differential Signaling: Differential pairs help reduce noise and improve signal integrity

9. Decoupling Capacitors: Proper use of decoupling capacitors helps maintain a stable power supply

Your next step

Are you ready to take the next step towards getting in control of your electronics design? Get in touch!